Explores SystemVerilog/Verilog designs with najaeda: trace fan-in and fan-out, walk the module hierarchy and jump to source without pasting RTL into context.
Setup
This project documents no single launch command; follow its repository instructions.
keplertech
Explores SystemVerilog/Verilog designs with najaeda: trace fan-in and fan-out, walk the module hierarchy and jump to source without pasting RTL into context.
This project documents no single launch command; follow its repository instructions.