MCP server for FPGA hardware design in C⏚ - agents write a C-like HDL; the server compiles, checks, generates Verilog and synth-checks against the real toolchain.
接入配置
选择客户端，复制配置，再按项目文档补齐环境变量。
claude mcp add neosyn-fpga -- uvx neosyn-fpga-mcp~/.codex/config.toml
[mcp_servers.neosyn-fpga]
command = "uvx"
args = ["neosyn-fpga-mcp"]
# codex mcp add neosyn-fpga -- uvx neosyn-fpga-mcp~/.cursor/mcp.json
{
"mcpServers": {
"neosyn-fpga": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp"
]
}
}
}.vscode/mcp.json
{
"servers": {
"neosyn-fpga": {
"type": "stdio",
"command": "uvx",
"args": [
"neosyn-fpga-mcp"
]
}
}
}~/.gemini/settings.json
{
"mcpServers": {
"neosyn-fpga": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp"
]
}
}
}claude_desktop_config.json
{
"mcpServers": {
"neosyn-fpga": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp"
]
}
}
}.trae/mcp.json
{
"mcpServers": {
"neosyn-fpga": {
"command": "uvx",
"args": [
"neosyn-fpga-mcp"
]
}
}
}